1. Field of the Invention
This invention relates to a semiconductor device in which layered films and wiring layers on a semiconductor substrate are bonded together using the solid state bonding technique, and a manufacturing method therefor. More particularly, it relates to an improvement intended for reducing radiation noises.
2. Description of the Related Art
In the field of semiconductor devices, there has so far been known a electromagnetic noise shield for eliminating the noise in which an electrically conductive material is applied to the perimeter of a wiring layer on a semiconductor substrate in an encapsulating fashion, as disclosed for example in Japanese Laying-Open Patent H-5-47767.
There is also known from the Japanese Laying-Open Patent H-5-47943 such a structure in an analog/digital hybrid semiconductor device in which a shield line is arranged between a high-frequency digital signal line and an analog signal line susceptible to noise, at points of intersections, and a shield line is arranged as upper and lower layers and on lateral sides of the analog signal lines.
In the above-described conventional technique, the wiring on the same semiconductor substrate is encapsulated via an insulator with an electrically conductive material to prevent the effect of the radiation noise. This structure is effective to prevent occurrence of radiation noise on the same semiconductor substrate.
However, if the radiation noise on the multi-layer semiconductor substrate is to be prohibited from occurring, the above-mentioned structure cannot directly be used.
Specifically, with the multi-layer semiconductor substrate, a multi-layer film-forming process is required. With the increasing number of layers of the multi-layer film, the surface of the multi-layer film becomes increasingly irregular such that planar smoothness is lost. If the number of layers is increased further, the film surface becomes increasingly irregular to cause line breakage in the course of the process. This indicates that difficulties are met in forming the shield line as described above.
If a higher operating speed is achieved in the semiconductor device in time to come, it becomes necessary to reduce the length of the wiring (to increase the density) and to use wirings closer to straight wirings. That is, since the radiation level is higher in keeping pace with the increase in the operating speed, it is necessary to take measures against radiation noise, to reduce the length of the wiring (to increase the density) and to use wirings closer to straight wirings.
This is intimately related to a device structure of the semiconductor substrate, such that it is necessary to attempt to increase the operating rate of the semiconductor substrate in consideration of the grounding layer, power source layer and the wiring layer surrounding the device structure.
It is therefore an object of the present invention to provide a novel semiconductor device in which it is possible to reduce the length of the wiring, to use wirings closer to straight wirings and to take measures against radiation noise, and a method for manufacturing the novel semiconductor device.
In one aspect, the present invention provides a semiconductor device in which a plurality of semiconductor substrates, each carrying semiconductor elements, are bonded together, wherein an insulating layer is deposited on each semiconductor substrate, there being formed a connection wiring passing through the insulating layer for connection to a wiring layer on the semiconductor elements, and wherein an electrically conductive layer of an electrically conductive material, having an opening formed by patterning in register with the connection wiring, is formed on a junction surface of at least one of the semiconductor substrates. The semiconductor substrates are bonded together to interconnect the connection wirings formed on each semiconductor substrate.
In another aspect, the present invention provides a method for manufacturing a semiconductor device in which a plurality of semiconductor substrates, each carrying semiconductor elements, are bonded together, including the steps of depositing an insulating layer on a semiconductor substrate and forming a connection wiring connected to a wiring layer of the semiconductor elements in the insulating layer, forming an electrically conductive layer of an electrically conductive material, having an opening formed by patterning in register with the connection wiring, on a junction surface of at least one of the plural semiconductor substrates, smoothing the junction surface of each semiconductor substrate and applying a compressive load from both sides of the semiconductor substrates placed one on another to interconnect the semiconductor substrates and to interconnect the connection wirings formed in each semiconductor substrate.
According to the present invention, a wiring electrode and a grounding electrode are provided on each semiconductor substrate carrying semiconductor elements. An insulating layer and a grounding layer as an electrically conductive layer are deposited in this order on the surface of each semiconductor substrate. An opening is bored in the insulating layer and in the grounding layer and a grounding layer electrode and the grounding layer are electrically connected to each other via an electrically conductive material charged into the opening. The surfaces of the semiconductor substrates, formed by multiple layers, are planarized and smoothed. The planarized surfaces of the two semiconductor substrates are placed in a facing relation and aligned with respect to each other. The semiconductor substrates, thus aligned, are bonded to each other by applying loads thereon.
By this technique, that is by forming a grounding layer between the two substrates, the radiation noise generated from respective elements on the semiconductor substrate are absorbed by the grounding layer while the radiation noise generated from each element on the opposite side semiconductor substrate is similarly absorbed by the grounding layer, so that it is possible for the grounding layer to eliminate the reciprocal effect on the semiconductor elements on the semiconductor substrates. Since a common grounding layer is provided between the two substrates, it is possible to effect three-dimensional grounding interconnection via the opening to reduce the grounding wiring length.
Alternatively, a grounding layer and a power source layer, common to two semiconductor substrates, are provided between the two semiconductor substrates. That is, the wiring electrode, grounding electrode and the power source electrode are provided on one of the semiconductor substrates carrying the semiconductor elements, an insulating layer, a grounding layer and an insulating layer are sequentially formed on the surface of the semiconductor substrate, and openings are formed in the insulating layer, grounding layer and in the insulating layer. An electrically conductive member is placed in the openings. The grounding layer is electrically connected to the grounding electrode. The electrically conductive member in one of the openings is connected to the power source electrode while the electrically conductive member in the remaining opening is connected to the wiring electrode. The grounding wiring layer, power source wiring layer and the through-hole wiring are electrically insulated by an insulator, followed by surface polishing.
On the opposite side semiconductor substrate, carrying semiconductor elements, a wiring electrode, a grounding electrode and a power source electrode are provided, while an insulating layer and a power source layer are sequentially formed on the substrate surface. There are formed openings in the insulating layer and the power source layer and an electrically conductive member is placed in the openings. The grounding layer is electrically connected to the grounding electrode. The electrically conductive member in one of the openings is electrically connected to the power source wiring, while the electrically conductive member in the remaining opening is connected to the wiring electrode. The grounding wiring layer, power source wiring layer and the through-hole wiring are electrically insulated by an insulator, followed by surface polishing. The two substrates are placed in a facing relation to each other and aligned so that the wiring layers grounding layers and the power source wiring are aligned to one another, and a load is applied from both sides of the substrates.
Since the grounding layer and the power source layer operating for grounding and as a power source of the respective elements of the two substrates are provided between the substrates, the wiring length can be effectively reduced, while the radiation noise generated from one of the semiconductor substrates can be absorbed by the grounding layer.
The present invention thus provides an arrangement in which the grounding layer and the power source layer are sandwiched between the two substrates when the substrates are bonded together. A way is provided for reducing the wiring and prohibiting reciprocal interference of the radiation noises from both substrates.
According to the present invention as described above, since an electrically conductive layer (grounding layer) is provided between the first and second substrates, each carrying semiconductor elements, radiation noises from the semiconductor elements on the first substrate can be shielded without affecting the semiconductor elements on the second substrate. Also, signal transmission between the first and second substrates can be realized by a connection wiring (through-hole wiring) provided in the grounding layer sandwiched between the first and second substrates.
If a conductor layer serving as a power source layer is provided on each of the first and second substrates for extending parallel to a conductor layer operating as a grounding layer, these conductor layers can serve as power sources for the first and second substrates via the through-holes, thus improving the efficiency.
Also, in the manufacturing method according to the present invention, the first and second substrates from the separate processes, carrying the semiconductor elements, are bonded together by the solid state bonding technique. Thus, the multi-layer substrates, comprised of semiconductor substrates having different functions, can be produced easily, thus assuring efficient manufacture.